GammaCPU.vhdl

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

entity GammaCPU is
    Port (
        clk : in std_logic;
        reset : in std_logic;
        instruction : in std_logic_vector(31 downto 0);
        result : out std_logic_vector(31 downto 0);
        ready_for_instruction : out std_logic
    );
end GammaCPU;

architecture Behavioral of GammaCPU is

    component GammaStack is
        port(
            Clk : in std_logic;
            Reset : in std_logic;
            Enable : in std_logic;
            Data_In : in std_logic_vector(31 downto 0);
            Data_Out : out std_logic_vector(31 downto 0);
            Push_Mode : in std_logic;
            Stack_Full : out std_logic;
            Stack_Empty : out std_logic;
            Debug_Dump : in std_logic
        );
    end component;

    component GammaALU is 
        port(
            clk : in std_logic;
            left_operand : in std_logic_vector(31 downto 0);
            right_operand : in std_logic_vector(31 downto 0);
            op : in unsigned(15 downto 0);
            result : out std_logic_vector(31 downto 0);
            reset : in std_logic;
            enable : in std_logic
        );
    end component;

    type state_type is (
        Fetch, Decode, Execute, Execute_2,
        Waiting_For_Stack, Waiting_For_ALU,
        Execute_3, Execute_4, WriteBack, StackOperation
    );
    signal state : state_type := Fetch;
    signal only_first_stack : std_logic;

    -- Stack control
    signal stack_full : std_logic;
    signal stack_empty : std_logic;
    signal stack_push_flag : std_logic;
    signal stack_result : std_logic_vector(31 downto 0);
    signal stack_data : std_logic_vector(31 downto 0);
    signal stack_enable : std_logic;

    -- Registers and internal signals
    signal pc : std_logic_vector(31 downto 0) := (others => '0');
    signal instruction_reg : std_logic_vector(31 downto 0) := (others => '0');
    signal alu_result : std_logic_vector(31 downto 0) := (others => '0');

    -- ALU control
    signal alu_op : unsigned(15 downto 0);
    signal alu_left, alu_right : std_logic_vector(31 downto 0);
    signal alu_enable : std_logic;

    signal immediate : std_logic_vector(31 downto 0);

begin

    stack : GammaStack port map(
        Clk => clk,
        Reset => reset,
        Enable => stack_enable,
        Data_In => stack_data,
        Data_Out => stack_result,
        Push_Mode => stack_push_flag,
        Stack_Full => stack_full,
        Stack_Empty => stack_empty,
        Debug_Dump => '0'
    );

    alu : GammaALU port map(
        clk => clk,
        left_operand => alu_left,
        right_operand => alu_right,
        op => alu_op,
        result => alu_result,
        reset => reset,
        enable => alu_enable
    );

    process(clk, reset)
    begin
        if reset = '1' then
            state <= Fetch;
            pc <= (others => '0');
            ready_for_instruction <= '1';
            stack_enable <= '0';
            alu_enable <= '0';
            only_first_stack <= '0';

        elsif rising_edge(clk) then
            if alu_enable = '1' then
                alu_enable <= '0';
            end if;

            case state is
                when Fetch =>
                    if ready_for_instruction = '1' then
                        instruction_reg <= instruction;
                        pc <= std_logic_vector(unsigned(pc) + 4);
                        state <= Decode;
                        ready_for_instruction <= '0';
                    else
                        ready_for_instruction <= '1';
                    end if;

                when Decode =>
                    case instruction_reg(31 downto 24) is
                        when x"41" =>  -- i32.const
                            -- CORRECTED LINE: Perform sign-extension
                            stack_data <= std_logic_vector(resize(signed(instruction_reg(23 downto 0)), 32));
                            stack_push_flag <= '1';
                            stack_enable <= '1';
                            state <= StackOperation;
                        
                        -- Arithmetic
                        when x"6A" =>  -- i32.add
                            alu_op <= to_unsigned(0, 16);
                            state <= Execute;
                        when x"6B" =>  -- i32.sub
                            alu_op <= to_unsigned(1, 16);
                            state <= Execute;
                        when x"6C" =>  -- i32.mul
                            alu_op <= to_unsigned(2, 16);
                            state <= Execute;
                        when x"6D" =>  -- i32.div_s
                            alu_op <= to_unsigned(3, 16);
                            state <= Execute;
                        when x"6E" =>  -- i32.div_u
                            alu_op <= to_unsigned(15, 16);
                            state <= Execute;
                        when x"6F" =>  -- i32.rem_s
                            alu_op <= to_unsigned(17, 16);
                            state <= Execute;
                        when x"70" =>  -- i32.rem_u
                            alu_op <= to_unsigned(16, 16);
                            state <= Execute;

                        -- Comparison
                        when x"45" =>  -- i32.eqz
                            alu_op <= to_unsigned(4, 16);
                            only_first_stack <= '1';
                            state <= Execute;
                        when x"46" =>  -- i32.eq
                            alu_op <= to_unsigned(4, 16);
                            state <= Execute;
                        when x"47" =>  -- i32.ne
                            alu_op <= to_unsigned(5, 16);
                            state <= Execute;
                        when x"48" =>  -- i32.lt_s
                            alu_op <= to_unsigned(7, 16);
                            state <= Execute;
                        when x"49" =>  -- i32.lt_u
                            alu_op <= to_unsigned(12, 16);
                            state <= Execute;
                        when x"4A" =>  -- i32.gt_u
                            alu_op <= to_unsigned(11, 16);
                            state <= Execute;
                        when x"4B" =>  -- i32.gt_s
                            alu_op <= to_unsigned(6, 16);
                            state <= Execute;
                        when x"4C" =>  -- i32.le_s
                            alu_op <= to_unsigned(9, 16);
                            state <= Execute;
                        when x"4D" =>  -- i32.le_u
                            alu_op <= to_unsigned(14, 16);
                            state <= Execute;
                        when x"4E" =>  -- i32.ge_s
                            alu_op <= to_unsigned(8, 16);
                            state <= Execute;
                        when x"4F" =>  -- i32.ge_u
                            alu_op <= to_unsigned(13, 16);
                            state <= Execute;
                        
                        -- START: Added i32 binops
                        -- Bitwise
                        when x"71" => -- i32.and
                            alu_op <= to_unsigned(18, 16);
                            state <= Execute;
                        when x"72" => -- i32.or
                            alu_op <= to_unsigned(19, 16);
                            state <= Execute;
                        when x"73" => -- i32.xor
                            alu_op <= to_unsigned(20, 16);
                            state <= Execute;

                        -- Shift
                        when x"74" => -- i32.shl
                            alu_op <= to_unsigned(21, 16);
                            state <= Execute;
                        when x"75" => -- i32.shr_s
                            alu_op <= to_unsigned(22, 16);
                            state <= Execute;
                        when x"76" => -- i32.shr_u
                            alu_op <= to_unsigned(23, 16);
                            state <= Execute;

                        -- Rotate
                        when x"77" => -- i32.rotl
                            alu_op <= to_unsigned(24, 16);
                            state <= Execute;
                        when x"78" => -- i32.rotr
                            alu_op <= to_unsigned(25, 16);
                            state <= Execute;
                        -- END: Added i32 binops
                        
                        when others =>
                            state <= Fetch;
                    end case;

                when Execute =>
                    if stack_empty = '0' then
                        stack_push_flag <= '0';  -- pop right operand
                        stack_enable <= '1';
                        state <= StackOperation;
                    else
                        report "Stack underflow error in Execute state";
                        state <= Fetch;
                    end if;

                when Execute_2 =>
                    alu_right <= stack_result;
                    stack_enable <= '0';

                    if only_first_stack = '1' then
                        only_first_stack <= '0';
                        alu_left <= std_logic_vector(to_signed(0, 32));
                        alu_enable <= '1';
                        state <= Waiting_For_ALU;
                    else
                        stack_push_flag <= '0';  -- pop left operand
                        stack_enable <= '1';
                        state <= Waiting_For_Stack;
                    end if;

                when Waiting_For_Stack =>
                    stack_enable <= '0';
                    state <= Execute_3;

                when Execute_3 =>
                    alu_left <= stack_result;
                    alu_enable <= '1';
                    state <= Waiting_For_ALU;

                when Waiting_for_ALU =>
                    state <= Execute_4;

                when Execute_4 =>
                    stack_data <= alu_result;
                    stack_push_flag <= '1';
                    stack_enable <= '1';
                    state <= StackOperation;

                when StackOperation =>
                    if stack_push_flag = '1' then
                        result <= stack_data;
                        stack_enable <= '0';
                        state <= Fetch;
                    else
                        if stack_empty = '0' then
                            stack_enable <= '0';
                            state <= Execute_2;
                        end if;
                    end if;

                when WriteBack =>
                    state <= Fetch;

                when others =>
                    state <= Fetch;
            end case;
        end if;
    end process;

end Behavioral;