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Merge branch 'master' of https://github.com/The-OpenROAD-Project-private/OpenROAD-flow-scripts into secure-est_via_res
Signed-off-by: Eder Monteiro <[email protected]>
2 parents 3ef0d8e + e3f6ead commit 0ba0a2a

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docs/user/FlowVariables.md

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| <a name="ADDITIONAL_GDS"></a>ADDITIONAL_GDS| Hardened macro GDS files listed here.| |
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| <a name="ADDITIONAL_LEFS"></a>ADDITIONAL_LEFS| Hardened macro LEF view files listed here. The LEF information of the macros is immutable and used throughout all stages. Stored in the .odb file.| |
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| <a name="ADDITIONAL_LIBS"></a>ADDITIONAL_LIBS| Hardened macro library files listed here. The library information is immutable and used throughout all stages. Not stored in the .odb file.| |
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| <a name="ASAP7_USE_VT"></a>ASAP7_USE_VT| A space separated list of VT options to use with the ASAP7 standard cell library: RVT, LVT, SLVT.| RVT|
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| <a name="BALANCE_ROWS"></a>BALANCE_ROWS| Balance rows during placement.| 0|
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| <a name="BLOCKS"></a>BLOCKS| Blocks used as hard macros in a hierarchical flow. Do note that you have to specify block-specific inputs file in the directory mentioned by Makefile.| |
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| <a name="BUFFER_PORTS_ARGS"></a>BUFFER_PORTS_ARGS| Specify arguments to the buffer_ports call during placement. Only used if DONT_BUFFER_PORTS=0.| |
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## All stages variables
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- [ASAP7_USE_VT](#ASAP7_USE_VT)
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- [KEEP_VARS](#KEEP_VARS)
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- [NUM_CORES](#NUM_CORES)
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- [OPENROAD_HIERARCHICAL](#OPENROAD_HIERARCHICAL)

flow/designs/asap7/aes-block/config.mk

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export ABC_AREA = 1
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export CORE_UTILIZATION = 40
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export CORE_UTILIZATION = 47
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export CORE_ASPECT_RATIO = 1
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export CORE_MARGIN = 2
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export PLACE_DENSITY = 0.53
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export BLOCKS ?= aes_rcon aes_sbox
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export SYNTH_HIERARCHICAL = 1

flow/designs/asap7/aes-block/rules-base.json

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"compare": "<="
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},
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"placeopt__design__instance__count__stdcell": {
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"value": 10573,
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"value": 10501,
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"compare": "<="
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},
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"detailedplace__design__violations": {
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"value": 0,
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"compare": "=="
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},
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"cts__design__instance__count__setup_buffer": {
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"value": 919,
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"value": 913,
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"compare": "<="
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},
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"cts__design__instance__count__hold_buffer": {
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"value": 923,
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"value": 1691,
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"compare": "<="
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},
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"cts__timing__setup__ws": {
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"value": -124.0,
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"value": -148.0,
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"compare": ">="
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},
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"cts__timing__setup__tns": {
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"value": -5920.0,
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"value": -12100.0,
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"compare": ">="
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},
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"cts__timing__hold__ws": {
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"compare": "<="
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},
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"globalroute__timing__setup__ws": {
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"value": -150.0,
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"value": -133.0,
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"compare": ">="
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},
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"globalroute__timing__setup__tns": {
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"value": -6750.0,
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"value": -9610.0,
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"compare": ">="
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},
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"globalroute__timing__hold__ws": {
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"compare": ">="
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},
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"detailedroute__route__wirelength": {
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"value": 50927,
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},
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"detailedroute__route__drc_errors": {
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"compare": "<="
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},
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"finish__timing__setup__ws": {
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"value": -98.4,
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"compare": ">="
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},
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"finish__timing__setup__tns": {
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"value": -3780.0,
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"value": -5410.0,
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"compare": ">="
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},
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"finish__timing__hold__ws": {

flow/designs/asap7/swerv_wrapper/rules-base.json

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"compare": "<="
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},
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"finish__timing__setup__ws": {
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"value": -509.0,
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"compare": ">="
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},
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"finish__timing__setup__tns": {
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"value": -75900.0,
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"value": -92000.0,
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"compare": ">="
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},
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"finish__timing__hold__ws": {
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"value": -200.0,
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"compare": ">="
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},
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"finish__timing__hold__tns": {
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"value": -68300.0,
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"value": -90300.0,
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"compare": ">="
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},
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"finish__design__instance__area": {

flow/designs/gf12/bp_single/rules-base.json

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"compare": ">="
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"globalroute__timing__hold__tns": {
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"value": -2520.0,
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},
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"detailedroute__route__wirelength": {
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"compare": ">="
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},
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"finish__timing__hold__ws": {
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"value": -220.0,
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"finish__timing__hold__tns": {

flow/designs/gf12/ca53/rules-base.json

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"cts__timing__setup__tns": {
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"value": -400.0,
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},
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"cts__timing__hold__ws": {
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"compare": ">="
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},
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"globalroute__timing__hold__tns": {
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"value": -929.0,
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},
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"detailedroute__route__wirelength": {
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"finish__timing__hold__tns": {
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"finish__design__instance__area": {

flow/designs/nangate45/bp_be_top/rules-base.json

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"compare": "<="
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"cts__timing__setup__ws": {
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"value": -0.423,
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},
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"cts__timing__setup__tns": {
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"value": -27.0,
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"cts__timing__hold__ws": {
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"globalroute__timing__setup__ws": {
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"globalroute__timing__setup__tns": {
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"value": -30.9,
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flow/designs/nangate45/bp_fe_top/rules-base.json

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flow/designs/nangate45/swerv/config.mk

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export VERILOG_FILES = $(DESIGN_HOME)/src/$(DESIGN_NAME)/swerv_wrapper.sv2v.v
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export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/constraint.sdc
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export CORE_UTILIZATION = 40
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export CORE_UTILIZATION = 65
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export CORE_ASPECT_RATIO = 1
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export CORE_MARGIN = 5
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flow/designs/nangate45/swerv/constraint.sdc

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set clk_name core_clock
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set clk_port_name clk
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set clk_period 2.0
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set clk_period 1.75
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set clk_io_pct 0.2
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set clk_port [get_ports $clk_port_name]

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