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bazel: add bazel-orfs support to all public-PDK platforms and designs
Enable nangate45, gf180, ihp-sg13g2, and sky130hs platforms in MODULE.bazel and flow/BUILD.bazel. Create BUILD.bazel files for all design source directories and platform design directories. Unblock previously blocked asap7/sky130hd designs that only needed src/ BUILD.bazel files. Smoke-tested: gcd_test passes on all 4 new platforms. Skipped platforms without public PDK: gf12, gf55, rapidus2hp. Co-Authored-By: Claude Opus 4.6 (1M context) <[email protected]> Signed-off-by: Øyvind Harboe <[email protected]>
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Lines changed: 806 additions & 58 deletions

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MODULE.bazel

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@@ -62,6 +62,10 @@ orfs_designs(
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designs_dir = "//flow/designs:BUILD.bazel",
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platforms = [
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"asap7",
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"gf180",
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"ihp-sg13g2",
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"nangate45",
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"sky130hd",
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"sky130hs",
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],
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)

flow/BUILD.bazel

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@@ -44,28 +44,24 @@ filegroup(
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ext = ext,
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pdk = pdk,
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)
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for ext in [
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"gds",
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"lef",
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"lib",
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"lyt",
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"mk",
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"rules",
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"tcl",
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"v",
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] + {
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"sky130hd": ["tlef"],
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"asap7": [
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"lib.gz",
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"sdc",
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],
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}.get(pdk, [])
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for ext in {
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"asap7": ["gds", "lef", "lib", "lib.gz", "lyt", "mk", "rules", "sdc", "tcl", "v"],
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"gf180": ["gds", "lef", "lib.gz", "lyt", "mk", "rules", "tcl", "v"],
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"ihp-sg13g2": ["gds", "json", "lef", "lib", "lyt", "mk", "rules", "tcl", "v"],
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"nangate45": ["gds", "lef", "lib", "lyt", "mk", "rules", "tcl", "v"],
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"sky130hd": ["gds", "lef", "lib", "lyt", "mk", "rules", "tcl", "tlef", "v"],
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"sky130hs": ["gds", "lef", "lib", "lyt", "mk", "rules", "tcl", "tlef", "v"],
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}[pdk]
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] + [
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"platforms/common/**/*.v",
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]),
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config = ":platforms/{pdk}/config.mk".format(pdk = pdk),
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visibility = ["//visibility:public"],
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) for pdk in [
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"asap7",
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"gf180",
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"ihp-sg13g2",
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"nangate45",
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"sky130hd",
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"sky130hs",
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]]

flow/designs/asap7/cva6/BUILD.bazel

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@@ -3,7 +3,5 @@ load("@orfs_designs//:designs.bzl", "DESIGNS")
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exports_files(glob(["*"]))
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# TODO(bazel-orfs): orfs_design(designs = DESIGNS)
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# Blocked: flow/designs/src/cva6/ needs BUILD.bazel with :verilog filegroup.
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# Complex multi-directory source tree with many subdirectories needing BUILD files.
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# Also needs BUILD.bazel for VERILOG_INCLUDE_DIRS targets.
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orfs_design(designs = DESIGNS)
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flow/designs/asap7/ibex/BUILD.bazel

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@@ -3,7 +3,5 @@ load("@orfs_designs//:designs.bzl", "DESIGNS")
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exports_files(glob(["*"]))
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# TODO(bazel-orfs): orfs_design(designs = DESIGNS)
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# Blocked: config.mk references specific file src/ibex_sv/syn/rtl/prim_clock_gating.v
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# which needs a BUILD.bazel in src/ibex_sv/syn/rtl/.
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# Also needs BUILD.bazel for VERILOG_INCLUDE_DIRS target.
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orfs_design(designs = DESIGNS)
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flow/designs/asap7/jpeg/BUILD.bazel

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@@ -3,6 +3,5 @@ load("@orfs_designs//:designs.bzl", "DESIGNS")
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exports_files(glob(["*"]))
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# TODO(bazel-orfs): orfs_design(designs = DESIGNS)
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# Blocked: flow/designs/src/jpeg/ needs BUILD.bazel with :verilog filegroup.
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# Also needs BUILD.bazel for VERILOG_INCLUDE_DIRS include/ subdirectory.
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orfs_design(designs = DESIGNS)
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flow/designs/asap7/jpeg_lvt/BUILD.bazel

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@@ -3,6 +3,5 @@ load("@orfs_designs//:designs.bzl", "DESIGNS")
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exports_files(glob(["*"]))
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# TODO(bazel-orfs): orfs_design(designs = DESIGNS)
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# Blocked: flow/designs/src/jpeg_lvt/ needs BUILD.bazel with :verilog filegroup.
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# Also needs BUILD.bazel for VERILOG_INCLUDE_DIRS include/ subdirectory.
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orfs_design(designs = DESIGNS)
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flow/designs/asap7/mock-cpu/BUILD.bazel

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@@ -3,5 +3,5 @@ load("@orfs_designs//:designs.bzl", "DESIGNS")
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exports_files(glob(["*"]))
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# TODO(bazel-orfs): orfs_design(designs = DESIGNS)
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# Blocked: flow/designs/src/fifo/ needs BUILD.bazel with :verilog filegroup.
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orfs_design(designs = DESIGNS)
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flow/designs/asap7/riscv32i-mock-sram/BUILD.bazel

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@@ -3,6 +3,5 @@ load("@orfs_designs//:designs.bzl", "DESIGNS")
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exports_files(glob(["*"]))
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# TODO(bazel-orfs): orfs_design(designs = DESIGNS)
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# Blocked: includes riscv32i config which needs src/riscv32i/ BUILD.bazel.
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# Also a hierarchical design (BLOCKS=fakeram7_256x32).
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orfs_design(designs = DESIGNS)
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flow/designs/asap7/riscv32i/BUILD.bazel

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@@ -3,5 +3,5 @@ load("@orfs_designs//:designs.bzl", "DESIGNS")
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exports_files(glob(["*"]))
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# TODO(bazel-orfs): orfs_design(designs = DESIGNS)
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# Blocked: flow/designs/src/riscv32i/ needs BUILD.bazel with :verilog filegroup.
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orfs_design(designs = DESIGNS)
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flow/designs/asap7/swerv_wrapper/BUILD.bazel

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@@ -3,7 +3,5 @@ load("@orfs_designs//:designs.bzl", "DESIGNS")
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exports_files(glob(["*"]))
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# TODO(bazel-orfs): orfs_design(designs = DESIGNS)
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# Blocked: config.mk references specific file src/swerv/swerv_wrapper.sv2v.v
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# (not a wildcard), which needs exports_files in src/swerv/BUILD.bazel.
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# Also references lef/lib files via wildcards in the design directory.
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orfs_design(designs = DESIGNS)
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