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ihp-sg13g2/i2c-gpio-expander Expand file tree Collapse file tree Original file line number Diff line number Diff line change 33module (
44 name = "orfs" ,
55 version = "0.0.1" ,
6- compatibility_level = 1 ,
76)
87
98bazel_dep (name = "bazel-orfs" )
@@ -15,7 +14,7 @@ git_override(
1514 remote = "https://github.com/The-OpenROAD-Project/bazel-orfs.git" ,
1615)
1716
18- bazel_dep (name = "rules_python" , version = "1.2.0 " )
17+ bazel_dep (name = "rules_python" , version = "1.8.5 " )
1918bazel_dep (name = "rules_shell" , version = "0.6.1" )
2019
2120python = use_extension ("@rules_python//python/extensions:python.bzl" , "python" )
Original file line number Diff line number Diff line change 11export DESIGN_NICKNAME = riscv32i-mock-sram
22export BLOCKS =fakeram7_256x32
33
4+ # Override platform default (BLOCKS_grid_strategy.tcl) which defines an
5+ # ElementGrid macro grid with no stripes, producing empty PDN grids
6+ # (PDN-0232/0233). BLOCK_grid_strategy.tcl uses M4-M5 connections that
7+ # match the block's MAX_ROUTING_LAYER=M4 constraint.
8+ export PDN_TCL = $(PLATFORM_DIR ) /openRoad/pdn/BLOCK_grid_strategy.tcl
9+
410include designs/asap7/riscv32i/config.mk
511
Original file line number Diff line number Diff line change @@ -4,6 +4,15 @@ export PLATFORM = ihp-sg13g2
44
55export VERILOG_FILES = $(DESIGN_HOME ) /$(PLATFORM ) /$(DESIGN_NICKNAME ) /$(DESIGN_NAME ) .v \
66 $(DESIGN_HOME ) /$(PLATFORM ) /$(DESIGN_NICKNAME ) /I2cGpioExpander.v
7+ # IO pad cells -- platform config.mk adds these conditionally when
8+ # FOOTPRINT_TCL is set, but declare them explicitly for robustness.
9+ export VERILOG_FILES += $(PLATFORM_DIR ) /verilog/sg13g2_io.v
10+ export ADDITIONAL_LEFS += $(PLATFORM_DIR ) /lef/sg13g2_io.lef \
11+ $(PLATFORM_DIR ) /lef/bondpad_70x70.lef
12+ export ADDITIONAL_LIBS += $(PLATFORM_DIR ) /lib/sg13g2_io_typ_1p2V_3p3V_25C.lib
13+ export ADDITIONAL_SLOW_LIBS += $(PLATFORM_DIR ) /lib/sg13g2_io_slow_1p08V_3p0V_125C.lib
14+ export ADDITIONAL_FAST_LIBS += $(PLATFORM_DIR ) /lib/sg13g2_io_fast_1p32V_3p6V_m40C.lib
15+ export ADDITIONAL_GDS += $(PLATFORM_DIR ) /gds/sg13g2_io.gds
716export SDC_FILE = $(DESIGN_HOME ) /$(PLATFORM ) /$(DESIGN_NICKNAME ) /constraint.sdc
817
918export SEAL_GDS = $(DESIGN_HOME ) /$(PLATFORM ) /$(DESIGN_NICKNAME ) /sealring.gds.gz
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