Merge branch 'master' of https://github.com/The-OpenROAD-Project-private/OpenROAD-flow-scripts into secure-est_via_res

Signed-off-by: Eder Monteiro <emrmonteiro@precisioninno.com>

Author: eder-matheus

flow/Makefile

@@ -389,6 +389,8 @@ endef
 # Custom target to go from synthesis to placement in a single OpenROAD run
 $(eval $(call do-step,1_3_floorplan_to_place, $(RESULTS_DIR)/1_synth.odb $(RESULTS_DIR)/1_synth.sdc,floorplan_to_place))
 
+$(eval $(call OPEN_GUI_SHORTCUT,yosys,1_2_yosys.v))
+
 .PHONY: floorplan_to_place
 floorplan_to_place: $(RESULTS_DIR)/1_synth.odb $(RESULTS_DIR)/1_synth.sdc
 	$(UNSET_AND_MAKE) do-1_3_floorplan_to_place
@@ -777,6 +779,7 @@ $(eval $(call OPEN_GUI_SHORTCUT,final,6_final.odb))
 
 $(foreach file,$(RESULTS_DEF),$(eval $(call OPEN_GUI,$(file),DEF_FILE)))
 $(foreach file,$(RESULTS_ODB),$(eval $(call OPEN_GUI,$(file),ODB_FILE)))
+$(foreach file,$(RESULTS_V),$(eval $(call OPEN_GUI,$(file),V_FILE)))
 
 # Write a def for the corresponding odb
 $(foreach file,$(RESULTS_ODB),$(file).def): %.def:

flow/designs/asap7/minimal/README.md

@@ -62,6 +62,10 @@ gui_synth
 The module hierarchy can here be examined to give a sense of
 area required for the default placement density.
 
+## `make gui_yosys` OpenROAD GUI information for Yosys netlist
+
+It is possible to set up hierarchical synthesis using ORFS, in which case it can be helpful to view a netlist with blackboxed submodules, in which case there's no .odb file and `make gui_synth` is not available.
+
 ## `make gui_floorplan` OpenROAD GUI information
 
 Next to iterate on floorplan settings:

flow/designs/nangate45/bp_fe_top/rules-base.json

@@ -80,11 +80,11 @@
         "compare": "<="
     },
     "finish__timing__setup__ws": {
-        "value": -0.123,
+        "value": -0.222,
         "compare": ">="
     },
     "finish__timing__setup__tns": {
-        "value": -6.88,
+        "value": -13.8,
         "compare": ">="
     },
     "finish__timing__hold__ws": {

flow/designs/nangate45/swerv_wrapper/config.mk

@@ -22,7 +22,5 @@ export MACRO_PLACE_HALO = 10 10
 export PLACE_DENSITY_LB_ADDON = 0.08
 export TNS_END_PERCENT        = 100
 
-export FASTROUTE_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/fastroute.tcl
-
 export SWAP_ARITH_OPERATORS = 1
 export OPENROAD_HIERARCHICAL = 1

flow/designs/nangate45/swerv_wrapper/fastroute.tcl

@@ -28,11 +28,11 @@
         "compare": "<="
     },
     "cts__timing__setup__ws": {
-        "value": -0.316,
+        "value": -0.114,
         "compare": ">="
     },
     "cts__timing__setup__tns": {
-        "value": -221.0,
+        "value": -0.926,
         "compare": ">="
     },
     "cts__timing__hold__ws": {
@@ -48,11 +48,11 @@
         "compare": "<="
     },
     "globalroute__timing__setup__ws": {
-        "value": -0.312,
+        "value": -0.273,
         "compare": ">="
     },
     "globalroute__timing__setup__tns": {
-        "value": -179.0,
+        "value": -7.04,
         "compare": ">="
     },
     "globalroute__timing__hold__ws": {
@@ -64,7 +64,7 @@
         "compare": ">="
     },
     "detailedroute__route__wirelength": {
-        "value": 4011972,
+        "value": 3659075,
         "compare": "<="
     },
     "detailedroute__route__drc_errors": {
@@ -80,19 +80,19 @@
         "compare": "<="
     },
     "finish__timing__setup__ws": {
-        "value": -0.379,
+        "value": -0.236,
         "compare": ">="
     },
     "finish__timing__setup__tns": {
-        "value": -256.0,
+        "value": -2.16,
         "compare": ">="
     },
     "finish__timing__hold__ws": {
-        "value": -0.11,
+        "value": -0.107,
         "compare": ">="
     },
     "finish__timing__hold__tns": {
-        "value": -1.73,
+        "value": -0.407,
         "compare": ">="
     },
     "finish__design__instance__area": {

flow/designs/nangate45/swerv_wrapper/rules-base.json

@@ -16,6 +16,17 @@ if { [env_var_exists_and_non_empty DEF_FILE] } {
   }
   set input_file $::env(DEF_FILE)
   log_cmd read_def $input_file
+} elseif { [env_var_exists_and_non_empty V_FILE] } {
+  log_cmd read_lef $::env(TECH_LEF)
+  log_cmd read_lef $::env(SC_LEF)
+  if { [env_var_exists_and_non_empty ADDITIONAL_LEFS] } {
+    foreach lef $::env(ADDITIONAL_LEFS) {
+      log_cmd read_lef $lef
+    }
+  }
+  set input_file $::env(V_FILE)
+  log_cmd read_verilog $input_file
+  log_cmd link_design {*}[hier_options] $::env(DESIGN_NAME)
 } else {
   set input_file $::env(ODB_FILE)
   log_cmd read_db {*}[hier_options] $input_file

flow/scripts/open.tcl

@@ -187,6 +187,7 @@ export RESULTS_ODB = $(notdir $(sort $(wildcard $(RESULTS_DIR)/*.odb)))
 export RESULTS_DEF = $(notdir $(sort $(wildcard $(RESULTS_DIR)/*.def)))
 export RESULTS_GDS = $(notdir $(sort $(wildcard $(RESULTS_DIR)/*.gds)))
 export RESULTS_OAS = $(notdir $(sort $(wildcard $(RESULTS_DIR)/*.oas)))
+export RESULTS_V = $(notdir $(sort $(wildcard $(RESULTS_DIR)/*.v)))
 export GDS_MERGED_FILE = $(RESULTS_DIR)/6_1_merged.$(STREAM_SYSTEM_EXT)
 
 define get_variables